Digital Fundamentals

Digital Fundamentals
اسم المؤلف
Floyd and Jain
التاريخ
4 أبريل 2020
المشاهدات
300
التقييم
(لا توجد تقييمات)
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Digital Fundamentals – 8th Edition
Floyd and Jain
Brief Contents
1 Introductory Digital Concepts 8 Counters 304
2 Number Systems, Operations,
and Codes 16
9 Shift Registers 354
10 Memory and Storage 390
3 Logic Gates 78
4 Boolean Algebra and
Logic Simplification 118
5 Combinational Logic 172
11 Integrated Circuit Technologies 452
12 Programmable Logic Devices (PLDs) 502
Answers to Odd-Numbered
Problems 552
6 Functions of Combinational Logic Z02
Glossary 570
7 Flip-Flops 266
Urheber hutetes MaterialContents
1|Introductory Digital Concept* Sertinn ffeviVu’t 7^
Chapter OhictiBes
Supplementary Tntblermfor Examples 21
Self-Teu
1-1 Digital and Analog Quantities 3 logic Gates U
1-2 Binary Digits, Logic Level;*, and Digital
Waveform *; t Chapter Objectscs
Inlntrtiirlmn
1-3 Introduction to Basic l-ogic Operations 9
The Inverter 7X
1-4 Digital Integrated Circuits
Summary
Pnihirnis
Supplemental PnMems for Examples 15 =2 lixamplcs of 1C Gales 107
Self-Ten IS Summary IW
Sell- I,-si IIP
B I Number Sytterm, Operationt, and Codes 16 PmhltUK I 11
Antwers
Chapter Objectives
Supplementary Problems for Examples 115
2-1 rVnin.il Numbers lh
Self-Ten 117
2-2 Binary Numbers 18
2-3 Decimal-to-Binary Conversion 21 4|Boolean Algebra and Logic Simplification 118
2-4 Binary Arithmetic 23
2-5 1’s and 2\ Complements of Binary Numbers 27 Chapter Objectives
2-6 Signed Numbers 29
2-7 Arithmetic Operations with Signed Numbers 33 1 Boolean Operations ami Expressions 118
2 4-2 IJIWS anil Rules of Boolean Algebra 120
-8 llftailn ini:il N’mnhcrs 42
2 4-3 DeMorgan’s Theorems 125
—*) Oelal Numbers 4.X
2-10 Binary Coded Decimal l BCD ) 51 Boolean Analysis of Logic Circuits 129
2-11 Digital Codes 54 5 Simplification Using Boolean Algebra 131
2 4-6 Standard l:on»\ of Boolean Expressions 134
—12 Sum 1- rmrmar Detection . 69 and Correction Codes 61 4-7 Boolean nxprrvsions IIIKI Truth Tables 140
ScH-Test 70 4-8 The Karnaugh Map 144
Pmhletm 71 4-0 Karnaugh Map SOP Mininn/aiioo 146
Answers 7S 4-10 Karnaugh Map POS Minimization 155
Urheberrechtlich geschutztes MaterialHK CONTENTS
—11 Hvc- Variable Karnaugh Maps 159 Summary 253
Summary 162 Self-Test “iss
Self.Test 16^ Problems 256
iTohlcms 163 Answers
Answers 169 Section Reviews ?ft /
Wr/y/iw IftV Supplementary Problems for Examples 263
Supplementary Problems for E xamples /70 Self-Test 265
Self-Test 171
Flip- Flops
Chapter Objectives
Combinational Logic 172
Chapter Objective* Inlruducliuo
tnlrodoelion 1 I alfhgs ?66
5=J Basic Combinational Logic Circuit* 172 7-2 Edee-Triggcrcd Rip-Flops 273
7-3 Master-Slave Flip-Flops 285
—4 Flip- Flop Operating Characteristics 287
2 Implementing Combinational Logic 177
5=3 The Universal Property of NANI) and NOR
( ‘.Hies IK 3 7-5 Flip-Flop Applications 290
v4 Combinational Logic Using NAND and NOR Summary 295
Gales. I K S
Self-Test 795
5-5 I-ogic Circuit Operation with Pulse
Answers 301
Section Reviews SOI
Supplementary Problems for ExarnfAes 302
Summary 194
Self
-Test I 9S
Priihleins 196
Answers Ttlf 1
Set lion Reviews 2tMI
Self-Test SOS
f *n4 infpr( 304
Supplementary Pnthlems for Examines 201
Self-Test 201 Chapter Objectives
Introduction
Functions of Combinational Logic 202 Asynchronous Counter Operation 305
Chapter Objectives
Synchronous Counter Operation 313
8=3 Up/Down Synchronous Counters 320
Introduction
=4 Design of Synchronous Counters 324
6-1 Basic Overview of Logic Functions 202
5 Cascaded Counters 333
Counter Decoding 336
Counter Applications 340
6=2 Hiisir Adders ?MX
6-3 Parallel Binary Adders 211
=4 Comparators 2 IX
6=5 Premiers ???
—ft FinnKiefs 211
fr-7 Code Converters
6-8 Multiplexers (Data Selectorsi 238
8=6
&Z=
Summary 345
Self-Test TI6
Problems TIT
Answers 351
Section Reviews ,?5/
6-9 Demultiplexers 247
Supplementary Problems for Examples S52
6=11) Parity Gcncnitors/Chcckcrs 248 Self-Test SSS
eschu1CONTENTS xxJ
9 Shift Registers 354 Introduction
11=1 K;LMCS of Digital Integrated Circuits 45 )
Chapter Objectives 11-2 Basic Operational Characteristics and
Introduction Parameters Jo1
-3 CMOS Circuits -170
11=4 TTL Circuits 475
5J Basic Shift Register Functions 354
2=2 Serial In/Scrial Out Shift Registers 356
2=3 Serin!In/Parallcl Out Shift Registers 360
9-4 Parallel In/Scrial Out Shift Registers 363
=5 Parallel ln/1’arollcl Out Shift Registers 366
=6 Bidirectional Shift Registers 368
9-7 Shift Register Counters 371
=8 Shift Register Applications 375
— jj tVirimi Considerations in ih«» i [jc of ~ i* ri 480
11-6 Comparison of CMOS and TTL
Performance 487
-7 Emitier-Cuuplcd Logic ( ECL ) Circuits
-8 PMOS- NMOS- and E:CMOS 489
Summary 492
SHf-Tro in’*
Summary 382
Problems 493
Problems 383 Ansm-rs •10|)
A n »;wm AK7 Srrtinrt Review\ 4*P)
Section Reviews 1X7 Supplementary Problems for Examples 5<X )
Supplementary Problems for Tramples 588 Self-Test 501
Self
-Test 389
12 Programmable Logic Devices (PLDs)
Chapter Objectives
502
Memory and Storage 390
1ntrnrlurtinn
Chapter Objective*
Inlmdtirrion 12=1 Introduction to Programmable Logic Devices
( PLDsi 502
10=1 Basics of Semiconductor Memory 390 12
-2 Simple Programmable I ogic Devices
(SPLDs) 504
12-3 Programmable /Array Logic ( PAL) 507
10-2 Random-Access Memories (RAMs) 394
10
-3 Read-Only Memories ( ROMs) 407
10-4 Programmable ROMs (PROMs anti
EPROMs) 412
=5 Rash Memories 416
IQ-* Memory Expansion 420
=7 Special Types of Memories 426
—4 Basic Concepts of GAL 513
12-5 Programming of SPLPs 517
-8 Inlmritidion In (Tl I )s SU
11-1 InlmHiirlinn In P P t1 S r i
Summary 543
-8 Magnetic and Optical Storage 432
10-9 Testing Memory Chips 438
Summary 443
^If-TVu Vll
Sdf-Tesi 444
PmhlmK J
Answers 450
Section Reviews -450
Supplementary Problems for Examples 451
Prnhlems SJh
fiqvui*i\ AJQ
Section fifi-vu’m W
Supplementary Problems firr Examples 551
Self-Test 55/
Answers to Odd-Numbered Problems 552
Self-Test 45/
1 I n t e g r a t e d Circuit Technologies
Chapter Objectives
452 Glossary 570
Index 579
eschu’
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